This is simple example of vector addition to describe how to use HLS kernels in Sdx Environment. This example highlights the concepts like PIPELINE which increases the kernel performance
KEY CONCEPTS: HLS C Kernel, OpenCL Host APIs
KEYWORDS: gmem, bundle, #pragma HLS INTERFACE, m_axi, s_axi4lite
Platform | Board | Software Version |
---|---|---|
xilinx_u200_qdma | Xilinx Alveo U200 | SDx 2019.1 |
xilinx_u50_xdma | Xilinx Alveo U50 | SDx 2019.1 |
xilinx_u250_qdma | Xilinx Alveo U250 | SDx 2019.1 |
xilinx_u200_xdma | Xilinx Alveo U200 | SDx 2019.1 |
xilinx_u280_xdma | Xilinx Alveo U280 | SDx 2019.1 |
xilinx_u250_xdma | Xilinx Alveo U250 | SDx 2019.1 |
Application code is located in the src directory. Accelerator binary files will be compiled to the xclbin directory. The xclbin directory is required by the Makefile and its contents will be filled during compilation. A listing of all the files in this example is shown below
src/host.cpp
src/vadd.cpp
Once the environment has been configured, the application can be executed by
./host <vadd XCLBIN>