Skip to content

Commit 54d8afa

Browse files
committed
Python bindings:
- Adapt test_uc_ctl_tb_cache test to the recent changes - Fixed typos - PEP8 fixes
1 parent eade532 commit 54d8afa

File tree

2 files changed

+5
-6
lines changed

2 files changed

+5
-6
lines changed

bindings/python/setup.py

+1-2
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ def copy_sources():
5555
shutil.copytree(os.path.join(ROOT_DIR, '../../samples'), os.path.join(SRC_DIR, 'samples/'))
5656
shutil.copytree(os.path.join(ROOT_DIR, '../../glib_compat'), os.path.join(SRC_DIR, 'glib_compat/'))
5757
shutil.copytree(os.path.join(ROOT_DIR, '../../cmake'), os.path.join(SRC_DIR, 'cmake/'))
58-
58+
5959
try:
6060
# remove site-specific configuration file, might not exist
6161
os.remove(os.path.join(SRC_DIR, 'qemu/config-host.mak'))
@@ -65,7 +65,6 @@ def copy_sources():
6565
src = []
6666
src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.[ch]")))
6767
src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.mk")))
68-
6968
src.extend(glob.glob(os.path.join(ROOT_DIR, "../../LICENSE*")))
7069
src.extend(glob.glob(os.path.join(ROOT_DIR, "../../README.md")))
7170
src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.TXT")))

bindings/python/tests/test_ctl.py

+4-4
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ def test_uc_ctl_tb_cache():
3939
# Fill the code buffer with NOP.
4040
code = b"\x90" * 8 * 512
4141

42-
print("Controling the TB cache in a finer granularity by uc_ctl.")
42+
print("Controlling the TB cache in a finer granularity by uc_ctl.")
4343

4444
uc.mem_map(addr, 0x10000)
4545

@@ -52,7 +52,7 @@ def test_uc_ctl_tb_cache():
5252
# Now we request cache for all TBs.
5353
for i in range(8):
5454
tb = uc.ctl_request_cache(addr + i * 512)
55-
print(f">>> TB is cached at {hex(tb.pc)} which has {tb.icount} instructions with {tb.size} bytes")
55+
print(f">>> TB is cached at {hex(tb[0])} which has {tb[1]} instructions with {tb[2]} bytes")
5656

5757
# Do emulation with all TB cached.
5858
cached = time_emulation(uc, addr, addr + len(code))
@@ -104,15 +104,15 @@ def test_uc_ctl_exits():
104104

105105
uc.ctl_set_exits(exits)
106106

107-
# This should stop at ADDRESS + 6 and increase eax, even thouhg we don't provide an exit.
107+
# This should stop at ADDRESS + 6 and increase eax, even though we don't provide an exit.
108108
uc.emu_start(addr, 0)
109109

110110
eax = uc.reg_read(UC_X86_REG_EAX)
111111
ebx = uc.reg_read(UC_X86_REG_EBX)
112112

113113
print(f">>> eax = {hex(eax)} and ebx = {hex(ebx)} after the first emulation")
114114

115-
# This should stop at ADDRESS + 8, even thouhg we don't provide an exit.
115+
# This should stop at ADDRESS + 8, even though we don't provide an exit.
116116
uc.emu_start(addr, 0)
117117

118118
eax = uc.reg_read(UC_X86_REG_EAX)

0 commit comments

Comments
 (0)