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fix(arm): correct write to ARM coprocessor (#2099)
This code was commented out since 2021, but by default, the error codewas initialized to `UC_REG_OK`, so there was no error returned untila result, any write to `UC_ARM_REG_C1_C0_2` returned an error.
1 parent 967dbc4 commit 6b9c1c8

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2 files changed

+26
-4
lines changed

2 files changed

+26
-4
lines changed

qemu/target/arm/unicorn_arm.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -440,10 +440,10 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
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env->regs[15] = (*(uint32_t *)value & ~1);
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*setpc = 1;
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break;
443-
// case UC_ARM_REG_C1_C0_2:
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// env->cp15.c1_coproc = *(int32_t *)value;
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// break;
446-
443+
case UC_ARM_REG_C1_C0_2:
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CHECK_REG_TYPE(int32_t);
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env->cp15.cpacr_el1 = *(int32_t *)value;
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break;
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case UC_ARM_REG_C13_C0_3:
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CHECK_REG_TYPE(int32_t);
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env->cp15.tpidrro_el[0] = *(int32_t *)value;

tests/unit/test_arm.c

+22
Original file line numberDiff line numberDiff line change
@@ -932,6 +932,27 @@ static void test_arm_thumb_tcg_opcode_cmn(void)
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TEST_CHECK(cmp_info.size == 32);
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}
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935+
static void test_arm_cp15_c1_c0_2(void)
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{
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uc_engine *uc;
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uint32_t val = 0x12345678;
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uint32_t read_val;
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941+
// Initialize emulator in ARM mode
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OK(uc_open(UC_ARCH_ARM, UC_MODE_ARM, &uc));
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OK(uc_ctl_set_cpu_model(uc, UC_CPU_ARM_CORTEX_A15));
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945+
// Write to CP15 C1_C0_2
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OK(uc_reg_write(uc, UC_ARM_REG_C1_C0_2, &val));
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// Read from CP15 C1_C0_2
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OK(uc_reg_read(uc, UC_ARM_REG_C1_C0_2, &read_val));
950+
951+
TEST_CHECK(read_val == val);
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_arm_nop", test_arm_nop},
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{"test_arm_thumb_sub", test_arm_thumb_sub},
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{"test_armeb_sub", test_armeb_sub},
@@ -960,4 +981,5 @@ TEST_LIST = {{"test_arm_nop", test_arm_nop},
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{"test_arm_mem_hook_read_write", test_arm_mem_hook_read_write},
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{"test_arm_tcg_opcode_cmp", test_arm_tcg_opcode_cmp},
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{"test_arm_thumb_tcg_opcode_cmn", test_arm_thumb_tcg_opcode_cmn},
984+
{"test_arm_cp15_c1_c0_2", test_arm_cp15_c1_c0_2},
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{NULL, NULL}};

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