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CI(full),CI(release): Should use if instead of ifdef
1 parent 5981f10 commit 791557e

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5 files changed

+20
-20
lines changed

5 files changed

+20
-20
lines changed

qemu/target/arm/helper-a64.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -568,7 +568,7 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr,
568568
uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr,
569569
uint64_t new_lo, uint64_t new_hi)
570570
{
571-
#ifdef HAVE_CMPXCHG128
571+
#if HAVE_CMPXCHG128 == 1
572572
Int128 oldv, cmpv, newv;
573573
uintptr_t ra = GETPC();
574574
bool success;
@@ -625,7 +625,7 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
625625
uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
626626
uint64_t new_lo, uint64_t new_hi)
627627
{
628-
#ifdef HAVE_CMPXCHG128
628+
#if HAVE_CMPXCHG128 == 1
629629
Int128 oldv, cmpv, newv;
630630
uintptr_t ra = GETPC();
631631
bool success;
@@ -657,7 +657,7 @@ uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
657657
void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
658658
uint64_t new_lo, uint64_t new_hi)
659659
{
660-
#ifdef HAVE_CMPXCHG128
660+
#if HAVE_CMPXCHG128 == 1
661661
Int128 oldv, cmpv, newv;
662662
uintptr_t ra = GETPC();
663663
int mem_idx;
@@ -682,7 +682,7 @@ void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
682682
void HELPER(casp_be_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
683683
uint64_t new_hi, uint64_t new_lo)
684684
{
685-
#ifdef HAVE_CMPXCHG128
685+
#if HAVE_CMPXCHG128 == 1
686686
Int128 oldv, cmpv, newv;
687687
uintptr_t ra = GETPC();
688688
int mem_idx;

qemu/target/i386/mem_helper.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,7 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
130130
if ((a0 & 0xf) != 0) {
131131
raise_exception_ra(env, EXCP0D_GPF, ra);
132132
} else {
133-
#ifdef HAVE_CMPXCHG128
133+
#if HAVE_CMPXCHG128 == 1
134134
int eflags = cpu_cc_compute_all(env, CC_OP);
135135

136136
Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);

qemu/target/ppc/mem_helper.c

+6-6
Original file line numberDiff line numberDiff line change
@@ -377,7 +377,7 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,
377377
uint64_t helper_lq_le_parallel(CPUPPCState *env, target_ulong addr,
378378
uint32_t opidx)
379379
{
380-
#ifdef HAVE_ATOMIC128
380+
#if HAVE_ATOMIC128 == 1
381381
Int128 ret;
382382

383383
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -394,7 +394,7 @@ uint64_t helper_lq_le_parallel(CPUPPCState *env, target_ulong addr,
394394
uint64_t helper_lq_be_parallel(CPUPPCState *env, target_ulong addr,
395395
uint32_t opidx)
396396
{
397-
#ifdef HAVE_ATOMIC128
397+
#if HAVE_ATOMIC128 == 1
398398
Int128 ret;
399399

400400
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -411,7 +411,7 @@ uint64_t helper_lq_be_parallel(CPUPPCState *env, target_ulong addr,
411411
void helper_stq_le_parallel(CPUPPCState *env, target_ulong addr,
412412
uint64_t lo, uint64_t hi, uint32_t opidx)
413413
{
414-
#ifdef HAVE_ATOMIC128
414+
#if HAVE_ATOMIC128 == 1
415415
Int128 val;
416416

417417
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -427,7 +427,7 @@ void helper_stq_le_parallel(CPUPPCState *env, target_ulong addr,
427427
void helper_stq_be_parallel(CPUPPCState *env, target_ulong addr,
428428
uint64_t lo, uint64_t hi, uint32_t opidx)
429429
{
430-
#ifdef HAVE_ATOMIC128
430+
#if HAVE_ATOMIC128 == 1
431431
Int128 val;
432432

433433
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -446,7 +446,7 @@ uint32_t helper_stqcx_le_parallel(CPUPPCState *env, target_ulong addr,
446446
uint64_t new_lo, uint64_t new_hi,
447447
uint32_t opidx)
448448
{
449-
#ifdef HAVE_CMPXCHG128
449+
#if HAVE_CMPXCHG128 == 1
450450
bool success = false;
451451

452452
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -473,7 +473,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr,
473473
uint64_t new_lo, uint64_t new_hi,
474474
uint32_t opidx)
475475
{
476-
#ifdef HAVE_CMPXCHG128
476+
#if HAVE_CMPXCHG128 == 1
477477
bool success = false;
478478

479479
/* We will have raised EXCP_ATOMIC from the translator. */

qemu/target/ppc/translate.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -2780,7 +2780,7 @@ static void gen_lq(DisasContext *ctx)
27802780
hi = cpu_gpr[rd];
27812781

27822782
if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
2783-
#ifdef HAVE_ATOMIC128
2783+
#if HAVE_ATOMIC128 == 1
27842784
TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx);
27852785
if (ctx->le_mode) {
27862786
tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ, ctx->mem_idx));
@@ -2958,7 +2958,7 @@ static void gen_std(DisasContext *ctx)
29582958
hi = cpu_gpr[rs];
29592959

29602960
if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
2961-
#ifdef HAVE_ATOMIC128
2961+
#if HAVE_ATOMIC128 == 1
29622962
TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx);
29632963
if (ctx->le_mode) {
29642964
tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ, ctx->mem_idx));
@@ -3574,7 +3574,7 @@ static void gen_lqarx(DisasContext *ctx)
35743574
hi = cpu_gpr[rd];
35753575

35763576
if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
3577-
#ifdef HAVE_ATOMIC128
3577+
#if HAVE_ATOMIC128 == 1
35783578
TCGv_i32 oi = tcg_temp_new_i32(tcg_ctx);
35793579
if (ctx->le_mode) {
35803580
tcg_gen_movi_i32(tcg_ctx, oi, make_memop_idx(MO_LEQ | MO_ALIGN_16,
@@ -3632,7 +3632,7 @@ static void gen_stqcx_(DisasContext *ctx)
36323632
hi = cpu_gpr[rs];
36333633

36343634
if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
3635-
#ifdef HAVE_CMPXCHG128
3635+
#if HAVE_CMPXCHG128 == 1
36363636
TCGv_i32 oi = tcg_const_i32(tcg_ctx, DEF_MEMOP(MO_Q) | MO_ALIGN_16);
36373637
if (ctx->le_mode) {
36383638
gen_helper_stqcx_le_parallel(tcg_ctx, cpu_crf[0], tcg_ctx->cpu_env,

qemu/target/s390x/mem_helper.c

+5-5
Original file line numberDiff line numberDiff line change
@@ -1695,7 +1695,7 @@ void HELPER(cdsg)(CPUS390XState *env, uint64_t addr,
16951695
void HELPER(cdsg_parallel)(CPUS390XState *env, uint64_t addr,
16961696
uint32_t r1, uint32_t r3)
16971697
{
1698-
#ifdef HAVE_CMPXCHG128
1698+
#if HAVE_CMPXCHG128 == 1
16991699
uintptr_t ra = GETPC();
17001700
Int128 cmpv = int128_make128(env->regs[r1 + 1], env->regs[r1]);
17011701
Int128 newv = int128_make128(env->regs[r3 + 1], env->regs[r3]);
@@ -1834,7 +1834,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1,
18341834
cpu_stq_data_ra(env, a1 + 0, int128_gethi(nv), ra);
18351835
cpu_stq_data_ra(env, a1 + 8, int128_getlo(nv), ra);
18361836
} else {
1837-
#ifdef HAVE_CMPXCHG128
1837+
#if HAVE_CMPXCHG128 == 1
18381838
TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
18391839
ov = helper_atomic_cmpxchgo_be_mmu(env, a1, cv, nv, oi, ra);
18401840
cc = !int128_eq(ov, cv);
@@ -1875,7 +1875,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1,
18751875
cpu_stq_data_ra(env, a2 + 0, svh, ra);
18761876
cpu_stq_data_ra(env, a2 + 8, svl, ra);
18771877
} else {
1878-
#ifdef HAVE_ATOMIC128
1878+
#if HAVE_ATOMIC128 == 1
18791879
TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
18801880
Int128 sv = int128_make128(svl, svh);
18811881
helper_atomic_sto_be_mmu(env, a2, sv, oi, ra);
@@ -2356,7 +2356,7 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t addr)
23562356

23572357
uint64_t HELPER(lpq_parallel)(CPUS390XState *env, uint64_t addr)
23582358
{
2359-
#ifdef HAVE_ATOMIC128
2359+
#if HAVE_ATOMIC128 == 1
23602360
uintptr_t ra = GETPC();
23612361
uint64_t hi, lo;
23622362
int mem_idx;
@@ -2393,7 +2393,7 @@ void HELPER(stpq)(CPUS390XState *env, uint64_t addr,
23932393
void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr,
23942394
uint64_t low, uint64_t high)
23952395
{
2396-
#ifdef HAVE_ATOMIC128
2396+
#if HAVE_ATOMIC128 == 1
23972397
uintptr_t ra = GETPC();
23982398
int mem_idx;
23992399
TCGMemOpIdx oi;

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