File tree 3 files changed +8
-5
lines changed
3 files changed +8
-5
lines changed Original file line number Diff line number Diff line change @@ -43,9 +43,7 @@ typedef enum uc_cpu_mips32 {
43
43
44
44
//> MIPS64 CPUS
45
45
typedef enum uc_cpu_mips64 {
46
- // This is used as an index into the array defined in "qemu/target/mips/translate_init.inc.c".
47
- // 64-bit CPU models are defined in the array directly after 32-bit models
48
- UC_CPU_MIPS64_R4000 = UC_CPU_MIPS32_ENDING ,
46
+ UC_CPU_MIPS64_R4000 = 0 ,
49
47
UC_CPU_MIPS64_VR5432 ,
50
48
UC_CPU_MIPS64_5KC ,
51
49
UC_CPU_MIPS64_5KF ,
Original file line number Diff line number Diff line change @@ -194,7 +194,12 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc)
194
194
mips_cpu_initfn (uc , cs );
195
195
196
196
env = & cpu -> env ;
197
- env -> cpu_model = & (mips_defs [uc -> cpu_model ]);
197
+ if (uc -> mode & UC_MODE_MIPS64 ){
198
+ // 64-bit CPU models are defined in the array directly after 32-bit models
199
+ env -> cpu_model = & (mips_defs [uc -> cpu_model + UC_CPU_MIPS32_ENDING ])
200
+ } else {
201
+ env -> cpu_model = & (mips_defs [uc -> cpu_model ]);
202
+ }
198
203
199
204
if (env -> cpu_model == NULL ) {
200
205
free (cpu );
Original file line number Diff line number Diff line change @@ -14,7 +14,7 @@ def run():
14
14
# See https://github.com/unicorn-engine/unicorn/pull/2111 for more details
15
15
uc .ctl_set_tlb_mode (UC_TLB_VIRTUAL )
16
16
17
- ADDRESS = 0x01_2000_3000
17
+ ADDRESS = 0x0120003000
18
18
19
19
uc .reg_write (UC_MIPS_REG_PC , ADDRESS )
20
20
uc .reg_write (UC_MIPS_REG_GP , 0x123 )
You can’t perform that action at this time.
0 commit comments