@@ -599,6 +599,54 @@ static void test_arm64_mem_prot_regress(void)
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OK (uc_close (uc ));
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}
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+ static bool test_arm64_mem_read_write_cb (uc_engine * uc , int type ,
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+ uint64_t address , int size ,
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+ int64_t value , void * user_data )
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+ {
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+ uint64_t * count = (uint64_t * )user_data ;
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+ switch (type ) {
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+ case UC_MEM_READ :
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+ count [0 ]++ ;
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+ break ;
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+ case UC_MEM_WRITE :
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+ count [1 ]++ ;
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+ break ;
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+ }
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+
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+ return 0 ;
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+ }
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+ static void test_arm64_mem_hook_read_write (void )
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+ {
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+ uc_engine * uc ;
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+ // ldp x1, x2, [sp]
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+ // stp x1, x2,[sp]
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+ // ldp x1, x2, [sp]
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+ // stp x1, x2,[sp]
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+ const char code [] = {0xe1 , 0x0b , 0x40 , 0xa9 , 0xe1 , 0x0b , 0x00 , 0xa9 ,
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+ 0xe1 , 0x0b , 0x40 , 0xa9 , 0xe1 , 0x0b , 0x00 , 0xa9 };
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+ uint64_t r_sp ;
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+ r_sp = 0x16db6a040 ;
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+ uc_hook hk ;
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+ uint64_t counter [2 ] = {0 , 0 };
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+
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+ uc_common_setup (& uc , UC_ARCH_ARM64 , UC_MODE_ARM , code , sizeof (code ),
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+ UC_CPU_ARM64_A72 );
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+
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+ uc_reg_write (uc , UC_ARM64_REG_SP , & r_sp );
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+ uc_mem_map (uc , 0x16db68000 , 1024 * 16 , UC_PROT_ALL );
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+
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+ OK (uc_hook_add (uc , & hk , UC_HOOK_MEM_READ , test_arm64_mem_read_write_cb ,
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+ counter , 1 , 0 ));
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+ OK (uc_hook_add (uc , & hk , UC_HOOK_MEM_WRITE , test_arm64_mem_read_write_cb ,
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+ counter , 1 , 0 ));
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+
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+ uc_assert_err (UC_ERR_OK , uc_emu_start (uc , code_start ,
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+ code_start + sizeof (code ), 0 , 0 ));
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+
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+ TEST_CHECK (counter [0 ] == 4 && counter [1 ] == 4 );
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+ OK (uc_close (uc ));
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+ }
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+
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TEST_LIST = {{"test_arm64_until" , test_arm64_until },
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{"test_arm64_code_patching" , test_arm64_code_patching },
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{"test_arm64_code_patching_count" , test_arm64_code_patching_count },
@@ -615,4 +663,5 @@ TEST_LIST = {{"test_arm64_until", test_arm64_until},
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{"test_arm64_mmu" , test_arm64_mmu },
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{"test_arm64_pc_wrap" , test_arm64_pc_wrap },
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{"test_arm64_mem_prot_regress" , test_arm64_mem_prot_regress },
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+ {"test_arm64_mem_hook_read_write" , test_arm64_mem_hook_read_write },
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{NULL , NULL }};
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