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implement m68k cr registers
1 parent 64c7226 commit d3674f8

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2 files changed

+139
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lines changed

2 files changed

+139
-0
lines changed

‎include/unicorn/m68k.h

+16
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,22 @@ typedef enum uc_m68k_reg {
5555
UC_M68K_REG_SR,
5656
UC_M68K_REG_PC,
5757

58+
UC_M68K_REG_CR_SFC,
59+
UC_M68K_REG_CR_DFC,
60+
UC_M68K_REG_CR_VBR,
61+
UC_M68K_REG_CR_CACR,
62+
UC_M68K_REG_CR_TC,
63+
UC_M68K_REG_CR_MMUSR,
64+
UC_M68K_REG_CR_SRP,
65+
UC_M68K_REG_CR_USP,
66+
UC_M68K_REG_CR_MSP,
67+
UC_M68K_REG_CR_ISP,
68+
UC_M68K_REG_CR_URP,
69+
UC_M68K_REG_CR_ITT0,
70+
UC_M68K_REG_CR_ITT1,
71+
UC_M68K_REG_CR_DTT0,
72+
UC_M68K_REG_CR_DTT1,
73+
5874
UC_M68K_REG_ENDING, // <-- mark the end of the list of registers
5975
} uc_m68k_reg;
6076

‎qemu/target/m68k/unicorn.c

+123
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,62 @@ uc_err reg_read(void *_env, int mode, unsigned int regid, void *value,
7474
CHECK_REG_TYPE(uint32_t);
7575
*(uint32_t *)value = env->sr;
7676
break;
77+
case UC_M68K_REG_CR_SFC:
78+
CHECK_REG_TYPE(uint32_t);
79+
*(uint32_t *)value = env->sfc;
80+
break;
81+
case UC_M68K_REG_CR_DFC:
82+
CHECK_REG_TYPE(uint32_t);
83+
*(uint32_t *)value = env->dfc;
84+
break;
85+
case UC_M68K_REG_CR_CACR:
86+
CHECK_REG_TYPE(uint32_t);
87+
*(uint32_t *)value = env->cacr;
88+
break;
89+
case UC_M68K_REG_CR_TC:
90+
CHECK_REG_TYPE(uint16_t);
91+
*(uint16_t *)value = env->mmu.tcr;
92+
break;
93+
case UC_M68K_REG_CR_MMUSR:
94+
CHECK_REG_TYPE(uint32_t);
95+
*(uint32_t *)value = env->mmu.mmusr;
96+
break;
97+
case UC_M68K_REG_CR_SRP:
98+
CHECK_REG_TYPE(uint32_t);
99+
*(uint32_t *)value = env->mmu.srp;
100+
break;
101+
case UC_M68K_REG_CR_USP:
102+
CHECK_REG_TYPE(uint32_t);
103+
*(uint32_t *)value = env->sp[M68K_USP];
104+
break;
105+
case UC_M68K_REG_CR_MSP:
106+
CHECK_REG_TYPE(uint32_t);
107+
*(uint32_t *)value = env->sp[M68K_SSP];
108+
break;
109+
case UC_M68K_REG_CR_ISP:
110+
CHECK_REG_TYPE(uint32_t);
111+
*(uint32_t *)value = env->sp[M68K_ISP];
112+
break;
113+
case UC_M68K_REG_CR_URP:
114+
CHECK_REG_TYPE(uint32_t);
115+
*(uint32_t *)value = env->mmu.urp;
116+
break;
117+
case UC_M68K_REG_CR_ITT0:
118+
CHECK_REG_TYPE(uint32_t);
119+
*(uint32_t *)value = env->mmu.ttr[M68K_ITTR0];
120+
break;
121+
case UC_M68K_REG_CR_ITT1:
122+
CHECK_REG_TYPE(uint32_t);
123+
*(uint32_t *)value = env->mmu.ttr[M68K_ITTR1];
124+
break;
125+
case UC_M68K_REG_CR_DTT0:
126+
CHECK_REG_TYPE(uint32_t);
127+
*(uint32_t *)value = env->mmu.ttr[M68K_DTTR0];
128+
break;
129+
case UC_M68K_REG_CR_DTT1:
130+
CHECK_REG_TYPE(uint32_t);
131+
*(uint32_t *)value = env->mmu.ttr[M68K_DTTR1];
132+
break;
77133
}
78134
}
79135

@@ -107,6 +163,73 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
107163
CHECK_REG_TYPE(uint32_t);
108164
cpu_m68k_set_sr(env, *(uint32_t *)value);
109165
break;
166+
case UC_M68K_REG_CR_SFC:
167+
CHECK_REG_TYPE(uint32_t);
168+
env->sfc = (*(uint32_t *)value) & 7;
169+
break;
170+
case UC_M68K_REG_CR_DFC:
171+
CHECK_REG_TYPE(uint32_t);
172+
env->dfc = (*(uint32_t *)value) & 7;
173+
break;
174+
case UC_M68K_REG_CR_CACR: {
175+
CHECK_REG_TYPE(uint32_t);
176+
uint32_t val = *(uint32_t*)value;
177+
if (m68k_feature(env, M68K_FEATURE_M68020)) {
178+
env->cacr = val & 0x0000000f;
179+
} else if (m68k_feature(env, M68K_FEATURE_M68030)) {
180+
env->cacr = val & 0x00003f1f;
181+
} else if (m68k_feature(env, M68K_FEATURE_M68040)) {
182+
env->cacr = val & 0x80008000;
183+
} else if (m68k_feature(env, M68K_FEATURE_M68060)) {
184+
env->cacr = val & 0xf8e0e000;
185+
}
186+
m68k_switch_sp(env);
187+
break;
188+
}
189+
case UC_M68K_REG_CR_TC:
190+
CHECK_REG_TYPE(uint16_t);
191+
env->mmu.tcr = *(uint16_t *)value;
192+
break;
193+
case UC_M68K_REG_CR_MMUSR:
194+
CHECK_REG_TYPE(uint32_t);
195+
env->mmu.mmusr = *(uint32_t *)value;
196+
break;
197+
case UC_M68K_REG_CR_SRP:
198+
CHECK_REG_TYPE(uint32_t);
199+
env->mmu.srp = *(uint32_t *)value;
200+
break;
201+
case UC_M68K_REG_CR_USP:
202+
CHECK_REG_TYPE(uint32_t);
203+
env->sp[M68K_USP] = *(uint32_t *)value;
204+
break;
205+
case UC_M68K_REG_CR_MSP:
206+
CHECK_REG_TYPE(uint32_t);
207+
env->sp[M68K_SSP] = *(uint32_t *)value;
208+
break;
209+
case UC_M68K_REG_CR_ISP:
210+
CHECK_REG_TYPE(uint32_t);
211+
env->sp[M68K_ISP] = *(uint32_t *)value;
212+
break;
213+
case UC_M68K_REG_CR_URP:
214+
CHECK_REG_TYPE(uint32_t);
215+
env->mmu.urp = *(uint32_t *)value;
216+
break;
217+
case UC_M68K_REG_CR_ITT0:
218+
CHECK_REG_TYPE(uint32_t);
219+
env->mmu.ttr[M68K_ITTR0] = *(uint32_t *)value;
220+
break;
221+
case UC_M68K_REG_CR_ITT1:
222+
CHECK_REG_TYPE(uint32_t);
223+
env->mmu.ttr[M68K_ITTR1] = *(uint32_t *)value;
224+
break;
225+
case UC_M68K_REG_CR_DTT0:
226+
CHECK_REG_TYPE(uint32_t);
227+
env->mmu.ttr[M68K_DTTR0] = *(uint32_t *)value;
228+
break;
229+
case UC_M68K_REG_CR_DTT1:
230+
CHECK_REG_TYPE(uint32_t);
231+
env->mmu.ttr[M68K_DTTR1] = *(uint32_t *)value;
232+
break;
110233
}
111234
}
112235

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