From d4ac64513cfebba55a2b7de24aa679cf22a8df78 Mon Sep 17 00:00:00 2001
From: Lowly Worm <cutlassc91@gmail.com>
Date: Wed, 8 Mar 2023 21:36:12 -0500
Subject: [PATCH 1/3] continue in THUMB mode if CPSR register has T bit
currently only PC | 1 being set will trigger thumb mode, but actually if T bit is set in CPSR, we should run in thumb mode.
---
uc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/uc.c b/uc.c
index 667f40ca4f..78592878a0 100644
--- a/uc.c
+++ b/uc.c
@@ -788,9 +788,15 @@ uc_err uc_emu_start(uc_engine *uc, uint64_t begin, uint64_t until,
break;
#endif
#ifdef UNICORN_HAS_ARM
- case UC_ARCH_ARM:
+ case UC_ARCH_ARM: {
+ // HACK: force bit 0 of pc to 1 if in thumb mode when starting.
+ // Thumb mode is determined by bit 5 of the CPSR register.
+ uint32_t cpsr;
+ uc_reg_read(uc, UC_ARM_REG_CPSR, &cpsr);
+ begin_pc32 |= ((cpsr & 0x20) >> 4);
uc_reg_write(uc, UC_ARM_REG_R15, &begin_pc32);
break;
+ }
#endif
#ifdef UNICORN_HAS_ARM64
case UC_ARCH_ARM64:
@@ -2431,4 +2437,4 @@ void trace_end(uc_tracer *tracer, trace_loc loc, const char *fmt, ...)
fprintf(stderr, "%.6fus\n",
(double)(end - tracer->starts[loc]) / (double)(1000));
}
-#endif
\ No newline at end of file
+#endif
From 7090776d3afc4a227fb2c93470bc0631ae398199 Mon Sep 17 00:00:00 2001
From: Lowly Worm <cutlassc91@gmail.com>
Date: Thu, 9 Mar 2023 16:18:30 -0500
Subject: [PATCH 2/3] Update uc.c
---
uc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/uc.c b/uc.c
index 78592878a0..58ada6500c 100644
--- a/uc.c
+++ b/uc.c
@@ -793,7 +793,7 @@ uc_err uc_emu_start(uc_engine *uc, uint64_t begin, uint64_t until,
// Thumb mode is determined by bit 5 of the CPSR register.
uint32_t cpsr;
uc_reg_read(uc, UC_ARM_REG_CPSR, &cpsr);
- begin_pc32 |= ((cpsr & 0x20) >> 4);
+ begin_pc32 &= ((cpsr & 0x20) >> 4);
uc_reg_write(uc, UC_ARM_REG_R15, &begin_pc32);
break;
}
From 43ac50237f416f165e10a4caeb5a6a9024829ccf Mon Sep 17 00:00:00 2001
From: Lowly Worm <cutlassc91@gmail.com>
Date: Thu, 9 Mar 2023 16:31:50 -0500
Subject: [PATCH 3/3] Update uc.c
---
uc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/uc.c b/uc.c
index 58ada6500c..d5eb17d93e 100644
--- a/uc.c
+++ b/uc.c
@@ -793,7 +793,9 @@ uc_err uc_emu_start(uc_engine *uc, uint64_t begin, uint64_t until,
// Thumb mode is determined by bit 5 of the CPSR register.
uint32_t cpsr;
uc_reg_read(uc, UC_ARM_REG_CPSR, &cpsr);
- begin_pc32 &= ((cpsr & 0x20) >> 4);
+ if (cpsr & 0x20) {
+ begin_pc32 |= 1;
+ }
uc_reg_write(uc, UC_ARM_REG_R15, &begin_pc32);
break;
}