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My application occasionally gets stuck posting k_events from DMA ISR handler (similar to #30074 (comment)).
It can take some seconds to up to hours to obtain that issue.
setup + signal/event flow
description
custom board with stm32-g474xx
zephyr version 4.1
adc connected via spi
signal/event flow
The adc is configured to sample data on its own at a given data rate at some kHz and notify the cpu via DR on each data available. The CPU then reads 3 bytes into a double-buffer. This is repeated until one half of the buffer is filled. Then a interrupt is triggered by the DMA. The CPU and the ADC do not share a common clock source, each of them has a distinct quartz oscillator attached. So scheduling events and the ISR from the DMA do have a varying alignment. I think this might be important for the observed behavior.
Reading the data is completely offloaded into HW of the SOC to have the buffer filled without any CPU time.
The chain is realized as such:
ADC data ready is connected to an EXTI pin
DMAMUX is triggered by EXTI
DMAMUX triggers 3 transfers on SPI
for each data ready on the SPI incoming data are transferred into a buffer via another DMA channel
on DMA half complete or transfer complete an interrupt is triggered
in the ISR handler i need to inform the application by posting an k_event
Posting an event from ISR handler does seem to yield a recursive spinlock fighting for timeout_lock in zephyrbase/kernel/timeout.c.
To get a more reasonable stack trace i have added the following to my proj.conf
CONFIG_ASSERT=y
CONFIG_NO_OPTIMIZATIONS=y
**stack trace** with locations of simultaneous write access on `timeout_lock`
I assume the varying point in time of DMA ISR relative to systick due to different clock sources can lead to this issue. When i repeat that experiment, it can take some seconds to up to hours to have that issue occurring.
question / assumption
For me this seems to be the underlying problem from that issue #30074 (comment)
similar setup (external ADC, SPI + DMA)
they closed the ticket by updating zepyhr; for me not possible - already using latest
i think the underlying issue might be the same in both cases
unfortunately there was never a stack trace posted
Any suggestions on how to create a reproducer here?
For the zephyr scheduler is it safe to do do k_event_post from an ISR which can be triggered at any time relative to systick?
The text was updated successfully, but these errors were encountered:
If I am understanding the information presented correctly, it would appear that the DMA triggered interrupt is occurring during sys_clock_announce(). Furthermore based on the stack trace, it would appeaer that the DMA ISR is getting serviced while sys_clock_announce() already held the timeout_lock spinlock.
This certainly seems unusual. I am not an ARM expert, but my expectation would be that for something like this to occur the priority of the serviced DMA interrupt would not just have to be higher than that of the timer interrupt, but likely unmaskable so that it could be serviced even while interrupts were locked by the timer ISR. If this is indeed true in that it matches your setup, then that DMA interrupt's ISR must not call Zephyr kernel routines.
henrikbrixandersen
changed the title
occasional spinlocks assertion fails on event_post from ISR with zepyhr 4.1
occasional spinlocks assertion fails on event_post from ISR with zephyr 4.1
Mar 14, 2025
spinlock assert fails on event_post from ISR
My application occasionally gets stuck posting k_events from DMA ISR handler (similar to #30074 (comment)).
It can take some seconds to up to hours to obtain that issue.
setup + signal/event flow
description
signal/event flow
The adc is configured to sample data on its own at a given data rate at some kHz and notify the cpu via DR on each data available. The CPU then reads 3 bytes into a double-buffer. This is repeated until one half of the buffer is filled. Then a interrupt is triggered by the DMA. The CPU and the ADC do not share a common clock source, each of them has a distinct quartz oscillator attached. So scheduling events and the ISR from the DMA do have a varying alignment. I think this might be important for the observed behavior.
Reading the data is completely offloaded into HW of the SOC to have the buffer filled without any CPU time.
The chain is realized as such:
k_event
Posting an event from ISR handler does seem to yield a recursive spinlock fighting for
timeout_lock
inzephyrbase/kernel/timeout.c
.To get a more reasonable stack trace i have added the following to my proj.conf
**stack trace** with locations of simultaneous write access on `timeout_lock`
insights
Two different locations in the stack trace are using the same spin lock from
timeout.c
.From systick
0x200028ac <timeout_lock>
is used atFrom ISR
0x200028ac <timeout_lock>
is used atI assume the varying point in time of DMA ISR relative to systick due to different clock sources can lead to this issue. When i repeat that experiment, it can take some seconds to up to hours to have that issue occurring.
question / assumption
For me this seems to be the underlying problem from that issue #30074 (comment)
Any suggestions on how to create a reproducer here?
For the zephyr scheduler is it safe to do do k_event_post from an ISR which can be triggered at any time relative to systick?
The text was updated successfully, but these errors were encountered: