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CI(full),CI(release): Do not refer to ATOMIC128 symbols if not available
1 parent 3818503 commit b4eb933

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4 files changed

+74
-10
lines changed

4 files changed

+74
-10
lines changed

‎qemu/target/arm/helper-a64.c

+18
Original file line numberDiff line numberDiff line change
@@ -568,6 +568,7 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr,
568568
uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr,
569569
uint64_t new_lo, uint64_t new_hi)
570570
{
571+
#ifdef HAVE_CMPXCHG128
571572
Int128 oldv, cmpv, newv;
572573
uintptr_t ra = GETPC();
573574
bool success;
@@ -585,6 +586,10 @@ uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr,
585586

586587
success = int128_eq(oldv, cmpv);
587588
return !success;
589+
#else
590+
g_assert_not_reached();
591+
return 0;
592+
#endif
588593
}
589594

590595
uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
@@ -620,6 +625,7 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
620625
uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
621626
uint64_t new_lo, uint64_t new_hi)
622627
{
628+
#ifdef HAVE_CMPXCHG128
623629
Int128 oldv, cmpv, newv;
624630
uintptr_t ra = GETPC();
625631
bool success;
@@ -641,12 +647,17 @@ uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
641647

642648
success = int128_eq(oldv, cmpv);
643649
return !success;
650+
#else
651+
g_assert_not_reached();
652+
return 0;
653+
#endif
644654
}
645655

646656
/* Writes back the old data into Rs. */
647657
void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
648658
uint64_t new_lo, uint64_t new_hi)
649659
{
660+
#ifdef HAVE_CMPXCHG128
650661
Int128 oldv, cmpv, newv;
651662
uintptr_t ra = GETPC();
652663
int mem_idx;
@@ -663,11 +674,15 @@ void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
663674

664675
env->xregs[rs] = int128_getlo(oldv);
665676
env->xregs[rs + 1] = int128_gethi(oldv);
677+
#else
678+
g_assert_not_reached();
679+
#endif
666680
}
667681

668682
void HELPER(casp_be_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
669683
uint64_t new_hi, uint64_t new_lo)
670684
{
685+
#ifdef HAVE_CMPXCHG128
671686
Int128 oldv, cmpv, newv;
672687
uintptr_t ra = GETPC();
673688
int mem_idx;
@@ -684,6 +699,9 @@ void HELPER(casp_be_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
684699

685700
env->xregs[rs + 1] = int128_getlo(oldv);
686701
env->xregs[rs] = int128_gethi(oldv);
702+
#else
703+
g_assert_not_reached();
704+
#endif
687705
}
688706

689707
/*

‎qemu/target/i386/mem_helper.c

+4-2
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,8 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
129129

130130
if ((a0 & 0xf) != 0) {
131131
raise_exception_ra(env, EXCP0D_GPF, ra);
132-
} else if (HAVE_CMPXCHG128) {
132+
} else {
133+
#ifdef HAVE_CMPXCHG128
133134
int eflags = cpu_cc_compute_all(env, CC_OP);
134135

135136
Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
@@ -148,8 +149,9 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
148149
eflags &= ~CC_Z;
149150
}
150151
CC_SRC = eflags;
151-
} else {
152+
#else
152153
cpu_loop_exit_atomic(env_cpu(env), ra);
154+
#endif
153155
}
154156
}
155157
#endif

‎qemu/target/ppc/mem_helper.c

+31-4
Original file line numberDiff line numberDiff line change
@@ -374,59 +374,79 @@ target_ulong helper_lscbx(CPUPPCState *env, target_ulong addr, uint32_t reg,
374374
}
375375

376376
#ifdef TARGET_PPC64
377-
#ifdef HAVE_ATOMIC128
378377
uint64_t helper_lq_le_parallel(CPUPPCState *env, target_ulong addr,
379378
uint32_t opidx)
380379
{
380+
#ifdef HAVE_ATOMIC128
381381
Int128 ret;
382382

383383
/* We will have raised EXCP_ATOMIC from the translator. */
384384
assert(HAVE_ATOMIC128);
385385
ret = helper_atomic_ldo_le_mmu(env, addr, opidx, GETPC());
386386
env->retxh = int128_gethi(ret);
387387
return int128_getlo(ret);
388+
#else
389+
g_assert_not_reached();
390+
return 0;
391+
#endif
388392
}
389393

390394
uint64_t helper_lq_be_parallel(CPUPPCState *env, target_ulong addr,
391395
uint32_t opidx)
392396
{
397+
#ifdef HAVE_ATOMIC128
393398
Int128 ret;
394399

395400
/* We will have raised EXCP_ATOMIC from the translator. */
396401
assert(HAVE_ATOMIC128);
397402
ret = helper_atomic_ldo_be_mmu(env, addr, opidx, GETPC());
398403
env->retxh = int128_gethi(ret);
399404
return int128_getlo(ret);
405+
#else
406+
g_assert_not_reached();
407+
return 0;
408+
#endif
400409
}
401410

402411
void helper_stq_le_parallel(CPUPPCState *env, target_ulong addr,
403412
uint64_t lo, uint64_t hi, uint32_t opidx)
404413
{
414+
#ifdef HAVE_ATOMIC128
405415
Int128 val;
406416

407417
/* We will have raised EXCP_ATOMIC from the translator. */
408418
assert(HAVE_ATOMIC128);
409419
val = int128_make128(lo, hi);
410420
helper_atomic_sto_le_mmu(env, addr, val, opidx, GETPC());
421+
#else
422+
g_assert_not_reached();
423+
return 0;
424+
#endif
411425
}
412426

413427
void helper_stq_be_parallel(CPUPPCState *env, target_ulong addr,
414428
uint64_t lo, uint64_t hi, uint32_t opidx)
415429
{
430+
#ifdef HAVE_ATOMIC128
416431
Int128 val;
417432

418433
/* We will have raised EXCP_ATOMIC from the translator. */
419434
assert(HAVE_ATOMIC128);
420435
val = int128_make128(lo, hi);
421436
helper_atomic_sto_be_mmu(env, addr, val, opidx, GETPC());
437+
#else
438+
g_assert_not_reached();
439+
return 0;
440+
#endif
422441
}
423442
#endif
424443

425-
#ifdef HAVE_CMPXCHG128
444+
426445
uint32_t helper_stqcx_le_parallel(CPUPPCState *env, target_ulong addr,
427446
uint64_t new_lo, uint64_t new_hi,
428447
uint32_t opidx)
429448
{
449+
#ifdef HAVE_CMPXCHG128
430450
bool success = false;
431451

432452
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -443,12 +463,17 @@ uint32_t helper_stqcx_le_parallel(CPUPPCState *env, target_ulong addr,
443463
}
444464
env->reserve_addr = -1;
445465
return env->so + success * CRF_EQ_BIT;
466+
#else
467+
g_assert_not_reached();
468+
return 0;
469+
#endif
446470
}
447471

448472
uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr,
449473
uint64_t new_lo, uint64_t new_hi,
450474
uint32_t opidx)
451475
{
476+
#ifdef HAVE_CMPXCHG128
452477
bool success = false;
453478

454479
/* We will have raised EXCP_ATOMIC from the translator. */
@@ -465,9 +490,11 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr,
465490
}
466491
env->reserve_addr = -1;
467492
return env->so + success * CRF_EQ_BIT;
468-
}
469-
#endif
493+
#else
494+
g_assert_not_reached();
495+
return 0;
470496
#endif
497+
}
471498

472499
/*****************************************************************************/
473500
/* Altivec extension helpers */

‎qemu/target/s390x/mem_helper.c

+21-4
Original file line numberDiff line numberDiff line change
@@ -1695,6 +1695,7 @@ void HELPER(cdsg)(CPUS390XState *env, uint64_t addr,
16951695
void HELPER(cdsg_parallel)(CPUS390XState *env, uint64_t addr,
16961696
uint32_t r1, uint32_t r3)
16971697
{
1698+
#ifdef HAVE_CMPXCHG128
16981699
uintptr_t ra = GETPC();
16991700
Int128 cmpv = int128_make128(env->regs[r1 + 1], env->regs[r1]);
17001701
Int128 newv = int128_make128(env->regs[r3 + 1], env->regs[r3]);
@@ -1713,6 +1714,9 @@ void HELPER(cdsg_parallel)(CPUS390XState *env, uint64_t addr,
17131714
env->cc_op = fail;
17141715
env->regs[r1] = int128_gethi(oldv);
17151716
env->regs[r1 + 1] = int128_getlo(oldv);
1717+
#else
1718+
g_assert_not_reached();
1719+
#endif
17161720
}
17171721

17181722
static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1,
@@ -1829,13 +1833,15 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1,
18291833

18301834
cpu_stq_data_ra(env, a1 + 0, int128_gethi(nv), ra);
18311835
cpu_stq_data_ra(env, a1 + 8, int128_getlo(nv), ra);
1832-
} else if (HAVE_CMPXCHG128) {
1836+
} else {
1837+
#ifdef HAVE_CMPXCHG128
18331838
TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
18341839
ov = helper_atomic_cmpxchgo_be_mmu(env, a1, cv, nv, oi, ra);
18351840
cc = !int128_eq(ov, cv);
1836-
} else {
1841+
#else
18371842
/* Note that we asserted !parallel above. */
18381843
g_assert_not_reached();
1844+
#endif
18391845
}
18401846

18411847
env->regs[r3 + 0] = int128_gethi(ov);
@@ -1868,13 +1874,15 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1,
18681874
if (!parallel) {
18691875
cpu_stq_data_ra(env, a2 + 0, svh, ra);
18701876
cpu_stq_data_ra(env, a2 + 8, svl, ra);
1871-
} else if (HAVE_ATOMIC128) {
1877+
} else {
1878+
#ifdef HAVE_ATOMIC128
18721879
TCGMemOpIdx oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
18731880
Int128 sv = int128_make128(svl, svh);
18741881
helper_atomic_sto_be_mmu(env, a2, sv, oi, ra);
1875-
} else {
1882+
#else
18761883
/* Note that we asserted !parallel above. */
18771884
g_assert_not_reached();
1885+
#endif
18781886
}
18791887
break;
18801888
default:
@@ -2348,6 +2356,7 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t addr)
23482356

23492357
uint64_t HELPER(lpq_parallel)(CPUS390XState *env, uint64_t addr)
23502358
{
2359+
#ifdef HAVE_ATOMIC128
23512360
uintptr_t ra = GETPC();
23522361
uint64_t hi, lo;
23532362
int mem_idx;
@@ -2364,6 +2373,10 @@ uint64_t HELPER(lpq_parallel)(CPUS390XState *env, uint64_t addr)
23642373

23652374
env->retxl = lo;
23662375
return hi;
2376+
#else
2377+
g_assert_not_reached();
2378+
return 0;
2379+
#endif
23672380
}
23682381

23692382
/* store pair to quadword */
@@ -2380,6 +2393,7 @@ void HELPER(stpq)(CPUS390XState *env, uint64_t addr,
23802393
void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr,
23812394
uint64_t low, uint64_t high)
23822395
{
2396+
#ifdef HAVE_ATOMIC128
23832397
uintptr_t ra = GETPC();
23842398
int mem_idx;
23852399
TCGMemOpIdx oi;
@@ -2391,6 +2405,9 @@ void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr,
23912405
oi = make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx);
23922406
v = int128_make128(low, high);
23932407
helper_atomic_sto_be_mmu(env, addr, v, oi, ra);
2408+
#else
2409+
g_assert_not_reached();
2410+
#endif
23942411
}
23952412

23962413
/* Execute instruction. This instruction executes an insn modified with

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