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wtdcodewtdcode
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CI(full),CI(release): Fix symbol clash
1 parent b4eb933 commit d437090

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lines changed

‎qemu/aarch64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_aarch64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_aarch64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_aarch64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_aarch64
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#define cpu_aarch64_init cpu_aarch64_init_aarch64
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#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_aarch64
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#define arm_cpu_update_virq arm_cpu_update_virq_aarch64

‎qemu/arm.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_arm
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#define gen_helper_cpsr_write gen_helper_cpsr_write_arm
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_arm
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_arm
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#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_arm
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#define arm_cpu_update_virq arm_cpu_update_virq_arm
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#define arm_cpu_update_vfiq arm_cpu_update_vfiq_arm

‎qemu/m68k.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_m68k
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#define gen_helper_cpsr_write gen_helper_cpsr_write_m68k
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_m68k
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_m68k
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#define cpu_m68k_init cpu_m68k_init_m68k
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#define helper_reds32 helper_reds32_m68k
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#define helper_redf32 helper_redf32_m68k

‎qemu/mips.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_mips
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#define gen_helper_cpsr_write gen_helper_cpsr_write_mips
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_mips
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#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips
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#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips
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#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips

‎qemu/mips64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_mips64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_mips64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_mips64
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#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips64
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#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips64
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#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips64

‎qemu/mips64el.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_mips64el
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#define gen_helper_cpsr_write gen_helper_cpsr_write_mips64el
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mips64el
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_mips64el
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#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips64el
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#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips64el
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#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips64el

‎qemu/mipsel.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_mipsel
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#define gen_helper_cpsr_write gen_helper_cpsr_write_mipsel
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_mipsel
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_mipsel
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#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mipsel
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#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mipsel
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#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mipsel

‎qemu/ppc.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_ppc
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#define gen_helper_cpsr_write gen_helper_cpsr_write_ppc
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_ppc
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_ppc
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#define ppc_cpu_unrealize ppc_cpu_unrealize_ppc
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#define ppc_cpu_instance_finalize ppc_cpu_instance_finalize_ppc
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#define ppc_cpu_do_interrupt ppc_cpu_do_interrupt_ppc

‎qemu/ppc64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_ppc64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_ppc64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_ppc64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_ppc64
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#define ppc_cpu_unrealize ppc_cpu_unrealize_ppc64
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#define ppc_cpu_instance_finalize ppc_cpu_instance_finalize_ppc64
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#define ppc_cpu_do_interrupt ppc_cpu_do_interrupt_ppc64

‎qemu/riscv32.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_riscv32
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#define gen_helper_cpsr_write gen_helper_cpsr_write_riscv32
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_riscv32
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_riscv32
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#define riscv_cpu_mmu_index riscv_cpu_mmu_index_riscv32
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#define riscv_cpu_exec_interrupt riscv_cpu_exec_interrupt_riscv32
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#define riscv_cpu_fp_enabled riscv_cpu_fp_enabled_riscv32

‎qemu/riscv64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_riscv64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_riscv64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_riscv64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_riscv64
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#define riscv_cpu_mmu_index riscv_cpu_mmu_index_riscv64
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#define riscv_cpu_exec_interrupt riscv_cpu_exec_interrupt_riscv64
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#define riscv_cpu_fp_enabled riscv_cpu_fp_enabled_riscv64

‎qemu/s390x.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_s390x
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#define gen_helper_cpsr_write gen_helper_cpsr_write_s390x
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_s390x
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_s390x
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#define helper_uc_s390x_exit helper_uc_s390x_exit_s390x
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#define tcg_s390_tod_updated tcg_s390_tod_updated_s390x
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#define tcg_s390_program_interrupt tcg_s390_program_interrupt_s390x

‎qemu/sparc.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_sparc
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#define gen_helper_cpsr_write gen_helper_cpsr_write_sparc
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_sparc
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_sparc
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#define helper_compute_psr helper_compute_psr_sparc
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#define helper_compute_C_icc helper_compute_C_icc_sparc
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#define cpu_sparc_set_id cpu_sparc_set_id_sparc

‎qemu/sparc64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_sparc64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_sparc64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_sparc64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_sparc64
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#define helper_compute_psr helper_compute_psr_sparc64
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#define helper_compute_C_icc helper_compute_C_icc_sparc64
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#define cpu_sparc_set_id cpu_sparc_set_id_sparc64

‎qemu/tricore.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_tricore
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#define gen_helper_cpsr_write gen_helper_cpsr_write_tricore
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_tricore
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_tricore
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#define helper_fadd helper_fadd_tricore
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#define helper_fsub helper_fsub_tricore
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#define helper_fmul helper_fmul_tricore

‎qemu/x86_64.h

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#define gen_helper_cpsr_read gen_helper_cpsr_read_x86_64
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#define gen_helper_cpsr_write gen_helper_cpsr_write_x86_64
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#define tlb_reset_dirty_by_vaddr tlb_reset_dirty_by_vaddr_x86_64
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#define helper_stqcx_le_parallel helper_stqcx_le_parallel_x86_64
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#define cpu_get_tsc cpu_get_tsc_x86_64
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#define x86_cpu_get_memory_mapping x86_cpu_get_memory_mapping_x86_64
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#define cpu_x86_update_dr7 cpu_x86_update_dr7_x86_64

‎symbols.sh

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gen_helper_cpsr_read \
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gen_helper_cpsr_write \
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tlb_reset_dirty_by_vaddr \
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helper_stqcx_le_parallel \
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"
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x86_64_SYMBOLS="

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